Samsung Initiates Production of 256-Gigabit 3D Vertical NAND Flash Memory with 48 Layer Array

By CIOReview | Tuesday, September 8, 2015
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FREMONT, CA: Samsung recently announced the mass production of 256-gigabit 3D Vertical NAND flash memory provided with 48 layers 3-bit multi-level-cell (MLC) arrays for use in solid state drives.

“By making full use of Samsung V-NAND’s excellent features, we will expand our premium-level business in the enterprise and data center market segments, as well as in the consumer market, while continuing to strengthen our strategic SSD focus,” says Young-Hyun Jun, President of the Memory Business, Samsung Electronics.

The chip which is no larger than the tip of a finger doubles the density of conventional 128Gb NAND flash chips and the capacity of existing SSD line-ups, enables 256Gb of memory storage on a single die, doubles and emerges as the ideal solution for multi-terabyte SSDs.

The current product, 3rd generation V-NAND (48-layer 3-bit MLC V-NAND) chip is developed based on the 2nd generation V-NAND (32-layer 3-bit MLC V-NAND) chips that were introduced to market in August 2014. Comparatively, the 3rd generation chip utilizes more than 30 percent reduced power compared to the 2nd generation chip. The former is 40 percent more productive than the latter, bringing-in enhanced cost competitiveness.

Each cell in the V-NAND utilizes the 3D Charge Trap Flash (CTF) structure by where cell arrays are vertically arranged as a 48 storied assembly. It is electrically connected to 1.8 billion channel holes through the arrays, where each cell is capable of storing 3 bits of data leading to 256 billion bits of data on the whole chip.

Samsung future plans include extension of its high-density SSD sales to enterprise and data center storage markets Peripheral Component Interconnect Express (PCIe), Non-Volatile Memory Express (NVMe) and Serial Attached SCSI (SAS) interfaces.