Xilinx Unveils SDAccel Development Environment for Programming Languages with 25 Times Better Performance/Watt
NEW ORLEANS, LA: Xilinx – a provider of all Programmable field-programmable gate arrays (FPGAs), system on a chips (SoCs) and 3D integrated circuits (Ics) – announces the launch of the latest member of SDx family, SDAccel development environment for OpenCL, C and C++ for data center application acceleration leveraging FPGAs promising 25 times better performance per watt compared to computing processing units (CPUs) or graphics processing units (GPUs) and 3 times better than other FPGA solutions in performance and resource efficiecny.
SDAccel uses foundational compiler technology and allows developers to leverage new or existing OpenCL, C, and C++ code. It creates high performance accelerators, optimized for memory, dataflow and loop pipelining in data center applications like compute search, image recognition, machine learning, transcoding, storage compression and encryption.
SDAccel environment includes the programmer-ready integrated design environment (IDE), C-based FPGA optimized libraries and commercial off-the-shelf (COTS) platforms for data center use. The IDE gives coding templates and software libraries. Also, itenables compiling, debugging and profiling against development targets including emulation on x86, performance validation using fast simulation and native execution on FPGA processors. IDE executes the application on FPGA platforms with automatic instrumentation insertion for all supported development targets.
SDAccel is designed in such a way that the CPU/GPU developers can easily migrate their applications to FPGAs while maintaining and reusing their OpenCL, C and C++ code in a familiar workflow. SDAccel libraries contain OpenCL built-ins, digital signal processing (DSP), and video and linear algebra libraries for high performance, low power implementations.
SDAccel supports large applications with programs and loadable compute units. This development environment keeps the system functional during program transitions. It also creates FPGA-based compute units that can load new accelerator kernels while an application is running. Critical system interfaces and functions such as memory, Ethernet, Peripheral Component Interconnect Express (PCIe) and performance monitors are kept live throughout the application execution. FPGA accelerators can be shared across multiple applications with the help of on-the-fly reconfigurable compute units. For example, the developer can program through operational system to switch between image search, video transcoding and image processing.